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Saber Board PCB Design

In an effort to properly interface with the National Instruments SBRIO both mechanically and through software, the team developed a PCB.  The PCB was designed mainly as a breakout board, but also incorporated operational amplifiers for sensor inputs.  The PCB design was developed in the EAGLE Layout Editor utilizing two of the 50pin connectors on the SBRIO.  One of these connectors was primary used for Analog Inputs and the other was used for Digital I/O.  In addition the board was designed to have a 5v input rail in order to provide the voltage necessary to run the many sensors attached to it.  The final schematic for the Saber Board can be seen below.

With the schematic complete, it was necessary to create the footprints for the connectors which would be used.  We used Digikey PN # 67-1062-ND to interface with the 50 pos cable from the SBRIO and PNs #455-2248-ND/455-2219-ND to have secure three pin molex style connectors.  With these connectors the board layout was created and the programs auto routing feature was taken advantage of.  While the auto routing feature was not perfect it did save some time.   Two of the most important things that were done to the auto routing were to eliminate all sharp angles and to create both a ground and power plane on the top and bottom of board respectively.   These planes also served to help reduce both high and low frequency noise on the system.  The final board layout that was compiled can be seen below, the red lines represent traces that were placed on the top and the blue lines are the traces on the bottom.

We printed our boards with 4PCB and couldn’t have been happier with the return time.  We had our boards in head less than a week later.  The boards were then assembled and tested as seen below.

While we were working on this PCB externally to the SBRIO, there was also a development plan for the LabView code which would interface with the PCB.  The VI for this interface was setup to mimic the physical appearance of the PCB with the same naming scheme to ease the overall interface between the PCB and SBRIO.  This will allow future calls to the I/O pins to be intuitive and reduce the amount of errors.  The VI can be seen below and as you can see has the same row/ column layout as the physical PCB.

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